← AI Terminology

Wafer

A wafer is a thin, circular disc of ultra-pure silicon (typically 300 mm in diameter) on which hundreds of identical chips are simultaneously fabricated using photolithography — the foundational substrate from which every GPU, CPU, and AI accelerator is made.

Wafer starts per month is the primary capacity metric for semiconductor foundries.
Why It Matters in AI
Every AI chip — NVIDIA H100, Google TPU, Apple M-series — begins as a pattern etched onto a silicon wafer. Wafer capacity at leading foundries (TSMC, Samsung) is the physical ceiling on how many AI chips the world can produce. A single 300 mm wafer yields dozens to hundreds of dies depending on die size; larger dies (like the GH100 at 814 mm²) yield fewer per wafer and are more sensitive to defects. Wafer starts, yields, and advanced node allocation (N3, N4) are the supply-chain variables that determine AI hardware availability and pricing.
Key Points
Aspect Description
Size Standard: 300 mm diameter (industry since ~2001); 450 mm proposed but never commercialised
Die yield Usable dies per wafer = f(wafer area, die size, defect density) — larger dies = fewer per wafer
Process node Feature size etched onto wafer — N3 (3 nm), N4 (4 nm), N5 (5 nm) — smaller = denser/faster
Wafer starts Industry metric: how many wafers a foundry begins processing per month (wspm)
Full-wafer chip Cerebras WSE-3: one chip spans the entire 300 mm wafer — 900,000 AI cores, avoids packaging
Photolithography EUV or DUV light projects circuit patterns onto wafer coated with photoresist
Simple Analogy
A sheet of postage stamps: the sheet is the wafer, each stamp is a chip die. The printer (foundry) prints identical patterns across the whole sheet simultaneously; you then cut (dice) the sheet into individual stamps. Stamps near a printing defect are discarded — that is yield loss. A very large stamp (big die) means fewer stamps per sheet and higher per-unit cost.
Common Usage Examples
  • TSMC N4 wafer → NVIDIA H100: ~54 dies per 300 mm wafer at 814 mm² die size
  • Cerebras WSE-3: one 300 mm wafer = one chip — 900K cores, 44 GB on-chip SRAM
  • Capacity tracking: TSMC reports wafer revenue by node; analysts back-calculate AI chip supply
  • defect_density and die_area → yield equation: Y = e^(−D₀·A) (Poisson model)
  • CoWoS packaging bonds diced dies from separate wafers onto a shared interposer
Summary
In short: The silicon wafer is the starting material for every AI chip — a 300 mm disc on which foundries simultaneously etch hundreds of dies, making wafer capacity and yield the fundamental physical constraints on AI hardware supply.